Amplifiers, such as high-power amplifiers used in the base stations of wireless communication systems, typically exhibit non-linearity over their operating ranges. This non-linearity can result in noise that can corrupt or otherwise interfere with the communications. To address this problem, additional circuitry may be added to an amplifier in an attempt to linearize the effective amplifier response. Conventional techniques for linearizing amplifiers typically involve feed-forward compensation and/or pre-compensation.
In feed-forward compensation, an auxiliary signal is fed forward and combined with the output of the amplifier to adjust the output signal for non-linearities in the amplifier transfer function. In amplifier linearization based on pre-compensation, the input signal that is to be amplified is pre-distorted prior to being applied to the amplifier in order to adjust the input signal based on known non-linearities in the amplifier transfer function. The pre-distortion module is typically controlled using a feed-back signal based on the output signal generated by the amplifier.
FIG. 1 shows a block diagram of a linearized amplifier system 100 according to the prior art. Amplifier system 100 utilizes pre-compensation to linearize the response of a high-power amplifier (HPA) 118, where the pre-distortion is implemented at baseband in the digital domain.
In particular, digital baseband processor 102 converts digital in-phase and quadrature input signals Iin and Qin into a pre-distorted digital intermediate frequency (IF) signal. More particularly, the digital input signals Iin and Qin are clipped and filtered (124) to generate clipped signals Iclip and Qclip, which are then upsampled (126) to form the baseband signals I and Q input to baseband pre-distorter 128, which generates baseband pre-distorted signals I′ and Q′. High-speed digital I/Q modulator 138 converts the baseband pre-distorted signals I′ and Q′ to the digital IF domain.
Within baseband pre-distorter 128, peak detector 132 computes the instantaneous digital power (12+Q2) of the baseband signals I and Q, which computed power is used as an index into look-up table (LUT) 134, which stores pre-distortion parameters A and B. Digital I/Q pre-distorter 136 applies the pre-distortion parameters A and B to the delayed baseband signals I and Q from delay 130 to generate the baseband pre-distorted signals I′ and Q′ according to Equations (1)-(3) as follows:I′+jQ′=(I+jQ)(A+jB)  (1)whereI′=IA−QB  (2)Q′=QA+IB  (3)Digital delay 130 delays the baseband signals I and Q to compensate for the processing times of blocks 132 and 134, so that I/Q pre-distorter 136 pre-distorts the signals I and Q with the appropriate corresponding parameters A and B.
Digital-to-analog converter (DAC) 104 converts the digital IF signal from processor 102 to the analog domain based on a clock signal from oscillator 106. The resulting pre-distorted analog signal is then low-pass filtered at extra-wide LPF 108, up-converted to radio frequency (RF) at multiplier 110 based on a mixing signal from local oscillator 112, band-pass filtered at extra-wide BPF 114, and amplified by low-power amplifier 116. The resulting analog pre-distorted signal is applied to high-power amplifier 118 to generate the amplified output signal from linearized amplifier system 100.
A portion of the amplified output signal can (optionally) be tapped by tap 120 and fed back to receiver 122, which monitors the amplified output signals for regrowth levels in order to dynamically update the values stored in LUT 134 for parameters A and B.
As described above, in linearized amplifier system 100 of FIG. 1, the pre-distortion processing functions of detection of signal power, retrieval of pre-distortion parameters A and B, and actual pre-distortion of the input signal are all implemented in the digital domain at baseband. In addition, the delay of the input signal for signal synchronization is also implemented in the digital domain at baseband. Meanwhile, the filtering of the analog pre-distorted signal is performed using extra-wide filters 108 and 114.
FIG. 2 shows a block diagram of another linearized amplifier system 200 according to the prior art. Like amplifier system 100 of FIG. 1, amplifier system 200 utilizes pre-compensation to linearize the response of a high-power amplifier 218; however, in amplifier system 200, the pre-distortion is implemented at RF in the analog domain.
In particular, digital baseband processor 202 comprises clip & filter block 224, upsampler 226, and high-speed digital I/Q modulator 238, which are analogous to corresponding blocks 124, 126, and 138 of FIG. 1, to convert the baseband digital in-phase and quadrature input signals Iin and Qin into an (undistorted) digital IF signal. DAC 204 converts the digital IF signal into an analog IF signal, which is then low-pass filtered at LPF 208, up-converted to RF at multiplier 210, band-pass filtered at narrow BPF 214, and amplified by low-power amplifier 216.
Part of the RF signal from amplifier 216 is tapped at tap 231 and forwarded to diode 232, which functions as an envelope detector to detect the instantaneous analog power of the RF signal. The analog power is digitized at analog-to-digital converter (ADC) 233, with the resulting digital power value being used an index into LUT 234, which stores pre-distortion parameters A and B. These pre-distortion parameters are converted to the analog domain by DACs 235a-b and then applied to analog pre-distorter 236 (e.g., a phase/gain adjuster or a vector modulator), which accordingly pre-distorts the delayed RF signal from delay 230 to generate the pre-distorted RF signal that is then applied to high-power amplifier 218 to generate the amplified output signal from linearized amplifier system 200.
As in amplifier system 100, a portion of the amplified output signal can (optionally) be tapped by tap 220 and fed back to receiver 222, which monitors the amplified output signals for regrowth levels in order to dynamically update the values stored in LUT 234 for parameters A and B.
As described above, in linearized amplifier system 200 of FIG. 2, the pre-distortion processing functions of detection of signal power and the actual pre-distortion of the signal are implemented at RF, while the retrieval of pre-distortion parameters A and B from the LUT is performed digitally. In addition, the delay of the input signal for signal synchronization is also at RF and in the analog domain. Meanwhile, the filtering of the (undistorted) analog signal can be performed using relatively narrow-band filters 208 and 214.
Comparing amplifier systems 100 of FIG. 1 and 200 of FIG. 2, both can compensate not only for non-linearities in the high-power amplifier, but also for any distortion along the entire transmit path. In the baseband pre-distortion implementation of FIG. 1, however, the bandwidth of the entire transmit path has to be several times larger than the signal bandwidth, since the pre-distortion energy falls outside the original signal bandwidth. On the other hand, in the RF pre-distortion implementation of FIG. 2, wide bandwidth is not required throughout the entire path. Nevertheless, the RF pre-distortion implementation does involve more analog circuitry (in particular, delay 230 and ADC 233), which can increase the cost. Moreover, performing envelope detection in the analog RF domain (using diode 232) can lead to accuracy problems relative to the detection in the digital baseband domain of the baseband pre-distortion implementation of FIG. 1.